Field of the Invention
Embodiments of the invention relate to a computer system; and more specifically, to the enhancement to the sleep state support of a computer system using a non-volatile random access memory.
Description of the Related Art
A. Current Memory and Storage Configurations
One of the limiting factors for computer innovation today is memory and storage technology. In conventional computer systems, main memory is typically implemented by dynamic random access memory (DRAM). DRAM-based memory consumes power even when no memory reads or writes occur because it must constantly recharge internal capacitors. DRAM-based memory is volatile, which means data stored in DRAM memory is lost once the power is removed.
A recent study shows that power used by server computers per year is increasing at an alarming rate. In 2005, the power consumption by server computers was more than 1.2 billion kilowatt-hours, representing 1% of worldwide electricity usage. The cost of electricity has increased 41% in a seven-year period from 2000-2007, according to the statistics provided by the U.S. Department of Energy. These statistics highlight the need for power-efficient server computers.
Conventionally, server operating system (OS) and virtual machine monitor (VMM) typically support only a subset of system sleep states due to various limitations, such as latency requirements, preservation of system state in case of a crash, etc. Typically, the supported system sleep states include S1 (standby state) and S5 (soft off state), as defined by the Advanced Configuration and Power Interface (ACPI) specification rev. 4.0a. In large memory configurations, the support for S4 (hibernate state) can be limited due to the high latency of entering that state. Support for other sleep states is either not present or varies based on the OS, VMM and platform configurations. This results in lost opportunities for power savings on server platforms.
B. Phase-Change Memory (PCM) and Related Technologies
Phase-change memory (PCM), also sometimes referred to as PCME, PRAM, PCRAM, Ovonic Unified Memory, Chalcogenide RAM and C-RAM, is a type of non-volatile computer memory which exploits the unique behavior of chalcogenide glass. As a result of heat produced by the passage of an electric current, this material can be switched between two states: crystalline and amorphous. Recent versions of PCM can achieve two additional distinct states, effectively doubling memory storage capacity.
For example, PCM can offer much higher performance in applications where writing quickly is important, in part because the memory element can be switched more quickly, and also because individual bits may be changed to either 1 or 0 without the need to first erase an entire block of cells (as is the case with flash memory (“flash”)). The high performance of PCM makes it potentially very beneficial in non-volatile memory roles that are currently performance-limited by memory access timing.
Additionally, while PCM devices degrade with use, they degrade much more slowly compared to flash memory. A PCM device may survive approximately 100 million write cycles. PCM lifetime is limited by mechanisms such as degradation due to GeSbTe (GST) thermal expansion during programming, metal (and other material) migration, and other mechanisms.